CHA2190 rohs compliant ref : dsCHA21902036 -05-feb.-02 1/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 20-30ghz low noise amplifier self biased gaas monolithic microwave ic description the circuit is a two-stages self biased wide band monolithic low noise amplifier. the circuit is manufactured with a standard phemt process: 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is supplied in chip form. main feature broad band performance 20-30ghz 2.2db noise figure 15db gain, 0.5db gain flatness low dc power consumption, 50ma 20dbm 3rd order intercept point chip size : 1.670 x 1.03x 0.1mm main characteristics on wafer typical measurement tamb = +25c symbol parameter min typ max unit nf noise figure at freq : 40ghz 2.2 3 db g gain 13 15 db d g gain flatness .0.5 1 db esd protections : electrostatic discharge sensitive device observe handling precautions ! -26 -22 -18 -14 -10 -6 -2 2 6 10 14 18 14 16 18 20 22 24 26 28 30 32 34 36 frequency ( ghz ) dbsij & nf ( db ) dbs11 dbs21 dbs22 nf
CHA2190 20-30ghz low noise amplifier ref : dsCHA21902036 -05-feb.-02 2/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 electrical characteristics tamb = +25c, vd = +4v (on wafer) symbol parameter min typ max unit fop operating frequency range 20 30 ghz g gain (1) 13 15 db d g gain flatness (1) 0.5 1 db nf noise figure (1) 2.2 3 db vswrin input vswr (1) 3.0:1 vswrout ouput vswr (1) 3.0:1 ip3 3rd order intercept point 20 dbm p1db output power at 1db gain compression (2) 11 dbm id drain bias current (3) 50 70 ma (1) these values are representative of wafer measur ements without bonding wire at the rf ports. (2)this value is a typical value when vd=4v vg1=vg2 =0v or not connected and can be increased see chip biasing option page 8 (3) this current is the typical value for low nois e and low current consumption biasing : vd=4v , vg1=vg2=0v or not connected. absolute maximum ratings (4) tamb = +25c symbol parameter values unit vd vg drain bias voltage (6) vg1 and vg2 max 4.5 +1 v v pin maximum peak input power overdrive (5) 15 dbm top operating temperature range -40 to +85 c tstg storage temperature range -55 to +125 c (4) operation of this device above anyone of these paramaters may cause permanent damage. (5) duration < 1s. (6) see chip biasing options page 8/9
20-30ghz low noise amplifier CHA2190 ref : dsCHA21902036 -05-feb.-02 3/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical results chip typical response (on wafer scattering paramete rs) tamb = +25c, vd=4v id=+50ma freq dbs11 ps11 dbs12 ps12 dbs21 ps21 dbs22 ps22 mod. pha. mod. pha. mod. pha. mod. pha. ghz db deg. db deg. db deg. db deg. 2.00 -0.37 -74.86 -70.84 -53.91 -29.15 56.50 -2.03 -84.36 5.00 -0.53 -151.19 -61.97 -91.19 -54.49 149.52 -4.15 -155.3 8 8.00 -0.59 157.19 -63.84 -162.71 -21.34 -178.25 -5.97 161.5 1 9.00 -0.66 141.20 -64.59 167.32 -14.41 176.87 -6.38 149.74 10.00 -0.79 125.32 -62.91 152.65 -7.52 163.27 -7.07 136.72 11.00 -1.00 109.39 -62.00 165.51 -1.20 140.92 -8.02 124.05 12.00 -1.26 93.11 -61.10 65.75 4.21 111.98 -9.38 111.29 13.00 -1.33 73.86 -54.13 -36.78 8.62 79.00 -11.25 101.00 14.00 -1.39 52.92 -45.84 -88.69 12.13 43.65 -14.06 92.70 15.00 -1.79 26.36 -41.70 -126.55 14.89 7.60 -16.84 90.96 16.00 -3.06 -7.27 -38.40 -159.80 16.82 -31.20 -19.09 106.80 17.00 -5.59 -46.11 -36.52 168.18 17.53 -68.31 -17.25 106.98 18.00 -9.90 -88.64 -34.29 139.94 17.39 -102.75 -16.27 97.39 19.00 -13.09 -132.63 -34.84 112.28 16.98 -131.32 -17.29 75. 43 20.00 -14.29 -179.39 -34.82 93.31 16.44 -156.45 -18.70 49.8 2 21.00 -14.48 143.23 -34.24 79.42 15.90 -179.20 -21.00 23.10 22.00 -14.71 118.23 -33.88 62.77 15.50 160.71 -20.27 -12.66 23.00 -14.92 100.80 -33.65 47.72 15.38 141.01 -20.10 -51.60 24.00 -15.42 87.80 -32.93 34.93 15.30 121.05 -17.74 -76.68 25.00 -16.38 78.89 -32.22 20.45 15.22 101.34 -16.09 -98.65 26.00 -16.55 77.15 -31.63 3.26 15.22 81.83 -14.40 -114.01 27.00 -16.33 77.12 -30.73 -11.52 15.24 61.81 -13.10 -131.22 28.00 -14.66 71.74 -30.72 -31.79 15.28 41.14 -12.13 -145.23 29.00 -13.19 61.95 -29.96 -45.41 15.27 20.38 -11.55 -159.84 30.00 -11.49 46.38 -29.74 -65.11 15.22 -1.31 -11.52 -175.03 31.00 -10.10 25.97 -29.29 -84.32 15.13 -23.85 -11.39 171.38 32.00 -8.49 1.99 -29.08 -104.88 14.92 -47.58 -12.30 155.28 33.00 -7.01 -24.08 -29.25 -127.09 14.46 -72.54 -13.60 135.9 5 34.00 -5.76 -50.88 -28.83 -147.90 13.73 -98.45 -16.45 111.5 3 35.00 -4.56 -78.91 -29.98 -177.63 12.61 -124.59 -22.00 75.0 8 36.00 -3.67 -103.63 -31.24 165.34 11.09 -149.58 -20.99 -22. 73 37.00 -3.02 -125.99 -31.84 144.11 9.30 -173.89 -17.26 -69.7 1 38.00 -2.57 -146.23 -35.07 127.07 7.29 163.92 -12.77 -88.90 39.00 -2.18 -162.01 -35.66 98.71 5.36 143.17 -10.42 -108.31 40.00 -1.82 -178.56 -36.87 109.75 3.19 121.75 -8.88 -119.32
CHA2190 20-30ghz low noise amplifier ref : dsCHA21902036 -05-feb.-02 4/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical results typical gain, matching and noise figure (on wafer m easurements) tamb = +25c vd = 4v vg1 and vg2 non connected; id = 50ma typical gain slope versus temperature: -0.025db/c typical noise figure slope versus temperature: 0. 011db/c chip typical response (in test jig) -26 -22 -18 -14 -10 -6 -2 2 6 10 14 18 14 16 18 20 22 24 26 28 30 32 34 36 frequency ( ghz ) dbs21 & nf ( db ) -26 -22 -18 -14 -10 -6 -2 2 6 10 14 18 rlosses(db) dbs21 nf dbs11 dbs22 0 2 4 6 8 10 12 14 16 18 20 22 24 18 20 22 24 26 28 30 32 34 36 frequency (ghz) ga / nf (db) 0 20 40 60 80 100 120 id (ma) id( vd=4.5v vg2=+1v) id (vd=4v) id (vd=4v vg2=-1v) gain: vd=4v nf : (all biasing options) gain: vd=4.5v vg2=+1v gain: vd=4v vg2=-1v
20-30ghz low noise amplifier CHA2190 ref : dsCHA21902036 -05-feb.-02 5/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 circuit typical response (in test-jig) power measurements (vd = 4v) typical output power (measurement in test jig) tamb = +25c these values are representative of the package asse mbly with input and output bonding. t ypical output power C1db for typical biasing 0 4 8 12 16 20 24 28 32 36 40 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 frequency (ghz) p-1db (dbm) / gain (p-1db) db -20 -10 0 10 20 30 40 50 60 70 80 id (ma) i d (vd=4v) i d (vd=4.5v vg2=+1v gain p-1db (vd=4v) gain p-1db (vd=4.5v vg2=+1v) p-1db (vd=4v) p-1db (vd=4.5v vg2=+1v) i d (vd=4v vg2=-1v gain p-1db (vd=4v vg2=-1v) p-1db (vd=4.5v vg2=+1v) 11 13 15 17 19 21 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 input power (dbm) gain (db) -5 -3 -1 1 3 5 7 9 11 13 15 output power(dbm) gain db(20ghz) gain db(24ghz) gain db(28ghz) gain db(30ghz) gain db(32ghz) pout dbm (20ghz) pout dbm (24ghz) pout dbm (28ghz) pout dbm (30ghz) pout dbm (32ghz)
CHA2190 20-30ghz low noise amplifier ref : dsCHA21902036 -05-feb.-02 6/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 mechanical data chip schematic and pad identification pad size: 100/100 m m, chip thickness 100um dimensions: 1670 m m x 1030m 35 m m
20-30ghz low noise amplifier CHA2190 ref :dsCHA21902036 -05-feb.-02 7/8 specifications s ubject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical chip assembly - * nominal input and output bonding lenght: 0.3 to 0.38nh for one 25 m m bond wire. - chip backside is dc and rf grounded chip biasing options
CHA2190 20-30ghz low noise amplifier ref : dsCHA21902036 -05-feb.-02 8/8 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 internal dc schematic this chip is self-biased, and flexibility is provid ed by the access to positive vg. the internal dc electrical schematic is given in or der to use these pads in a safe way. absolute recommandations: n1: do not exceed vds = 3.5 volt (vds: internal dr ain to source voltage). n2: do not bias in such a way that vgs* becomes po sitive. (vgs: internal gate to source voltage) typical biasing table and typical results in test j ig at 40 ghz ordering information chip form : CHA2190-99f/00 information furnished is believed to be accurate an d reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by impli cation or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and re places all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or s ystems without express written approval from united monolithic semiconductors s.a.s. 40ghz in test jig vds ( v) vg1 (v) vg2 (v) id (ma) typical nf(db) typical gain (db) typical p-1db (db) typical psat (db) standard 4 nc nc 50 2.2 15 11 13 low noise high linearity 4.5 nc 1 60 2.2 15 12 14 low noise /low current consumption 4 nc -1 40 2.2 15 9.5 12 switch off 3.5 -1 -8 0 x x x x
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